公司拥有核心研发人员 100 余人,核心高管及资深研发、技术人员均来自中外顶尖的半导体和光通信企业或相关行业学术机构,国内外一流大学硕博学历占比较高。
岗位要求:
1.Serve as key designer of CDR analog sub-components.
2.Simulation, layout instruction, parasitic extraction, design optimisation.
3.Facilitate chip integration.
任职资格:
1. 硕士或博士,微电子专业或相关专业.
2. >7 years of experience in high-speed (DC-30GHz) analog/mixed-signal IC development using SiGe BiCMOS and/or CMOS, including >3 years of experience in design of clock-and-data-recovery (CDR) products.
3. Design experience with critical high-speed CDR sub-components, such as VCO, phase/frequency detetor, PLLs,input/output equalizers, etc.
4, 熟悉SiGe, CMOS, SOI半导体工艺.
5.Expert user of Cadence Virtuoso, Spectre, and Assura, etc. EDA software for device modeling, simulation, layout, parasitic extraction and design/layout optimization.
联系方式:
邮箱:HR@xy-technology.com
电话:0571-28255233转01 15088651619
工作地点:
杭州、成都